Parosh Aziz Abdulla ; Mohamed Faouzi Atig ; Ahmed Bouajjani ; Tuan Phong Ngo - A Load-Buffer Semantics for Total Store Ordering

lmcs:3109 - Logical Methods in Computer Science, January 23, 2018, Volume 14, Issue 1 - https://doi.org/10.23638/LMCS-14(1:9)2018
A Load-Buffer Semantics for Total Store OrderingArticle

Authors: Parosh Aziz Abdulla ; Mohamed Faouzi Atig ; Ahmed Bouajjani ; Tuan Phong Ngo

    We address the problem of verifying safety properties of concurrent programs running over the Total Store Order (TSO) memory model. Known decision procedures for this model are based on complex encodings of store buffers as lossy channels. These procedures assume that the number of processes is fixed. However, it is important in general to prove the correctness of a system/algorithm in a parametric way with an arbitrarily large number of processes. In this paper, we introduce an alternative (yet equivalent) semantics to the classical one for the TSO semantics that is more amenable to efficient algorithmic verification and for the extension to parametric verification. For that, we adopt a dual view where load buffers are used instead of store buffers. The flow of information is now from the memory to load buffers. We show that this new semantics allows (1) to simplify drastically the safety analysis under TSO, (2) to obtain a spectacular gain in efficiency and scalability compared to existing procedures, and (3) to extend easily the decision procedure to the parametric case, which allows obtaining a new decidability result, and more importantly, a verification algorithm that is more general and more efficient in practice than the one for bounded instances.


    Volume: Volume 14, Issue 1
    Published on: January 23, 2018
    Accepted on: December 25, 2017
    Submitted on: February 1, 2017
    Keywords: Computer Science - Formal Languages and Automata Theory,Computer Science - Logic in Computer Science

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