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Mending Fences with Self-Invalidation and Self-Downgrade

Parosh Aziz Abdulla ; Mohamed Faouzi Atig ; Stefanos Kaxiras ; Carl Leonardsson ; Alberto Ros ; Yunyun Zhu.
Cache coherence protocols based on self-invalidation and self-downgrade have recently seen increased popularity due to their simplicity, potential performance efficiency, and low energy consumption. However, such protocols result in memory instruction reordering, thus causing extra program behaviors&nbsp;[&hellip;]
Published on January 16, 2018

A Load-Buffer Semantics for Total Store Ordering

Parosh Aziz Abdulla ; Mohamed Faouzi Atig ; Ahmed Bouajjani ; Tuan Phong Ngo.
We address the problem of verifying safety properties of concurrent programs running over the Total Store Order (TSO) memory model. Known decision procedures for this model are based on complex encodings of store buffers as lossy channels. These procedures assume that the number of processes is&nbsp;[&hellip;]
Published on January 23, 2018

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